This invention relates to semiconductor devices, and more particularly to improved metal contacts and interconnections for semiconductor integrated circuits.
In the past ten years, semiconductor memory devices have increased in density from 4K bit devices designed in 1972 to 256K and 1 megabit devices being designed in 1982, employing semiconductor chips of about the same size. To accomplish this, line resolution has been reduced to about one or two micron or less. In manufacture of these VLSI semiconductor devices, a thin metal coating such as aluminum is deposited and patterned to create contacts and interconnections. Problems occur in thinning of the narrow metal strip at near-vertical steps or sidewalls. Thinner metal at these steps or sidewalls results in higher resistance and a propensity for electro-migration failures. Heretofore, the steepness of the sidewalls has been minimized by a "reflow" process performed after the contact holes are opened, but this necessitates undesirable high temperature operations, as well as much larger geometries. Various etching methods have provided sloping sides, but for very high density devices the space occupied by the enlarged contact holes is unacceptable.
It is the principal object of this invention to provide an improved process for making VLSI type semiconductor integrated circuits; particularly for improving metallization coverage and metal-to-silicon contacts. Another object is to provide improved semiconductor devices with conductor or metallization patterns which make contacts through thick insulator coatings and avoid thinning at steps and discontinuities at holes in such coatings. A further object is to provide improved step coverage for metallization of semiconductor devices, without destroying narrow geometries.